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Digital Logic


NAND gate is one amongst the essential logic gates to perform the digital operation on the input signals. The logic gate provides the false or low output only their outputs is high or true. The logic gate may be a combination of an AND circuit and NOT gate. They are connected in cascade kind. it’s conjointly known as Negated AND circuit.

A logic gate may be a logical gate that is that the opposite of AND gate. it’s a mix of AND and NOT gates and may be an ordinarily used gate. The logic gate is important as a result of differing types of a mathematician perform are enforced by victimization it.

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The logic gate has the property of practical completeness. The perform completeness suggests that any sorts of gates may be enforced by exploitation the logic gate. it’s capable of manufacturing all

different logic gates, together with basic ones. The output of the logic gate stays false if all its inputs remain true. NAND gates square measure accessible in transistor-transistor logic and complementary metal-oxide-semiconductor (CMOS). it’s wide employed in applications like stealer alarms, deep-freeze warning buzzers, and automatic circuits.


NAND gate truth table is shown within the figure. within the truth table, it’s shown that once the tow inputs A & B is high then solely the output Y is low and all told the remaining conditions the output is high. The output of the NAND gate is often at logic one and solely goes to logic zero once all the inputs to the NAND gate area unit at logic one.


It is widely employed in applications like stealer alarms, fridge warning buzzers, and automatic circuits. Then the semiconductor unit|electronic transistor|semiconductor device|semiconductor unit|semiconductor becomes active and therefore the output of the transistor is shorted to ground which supplies LOW output. Same means altogether the opposite conditions one or 2 diodes are forward biased leading to shorting the V to ground. the overall VCC is shorted to the output terminal which supplies HIGH output.

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CMOS is that the combination of P-MOS and N-MOS. The circuit shows the belief of the CMOS NAND gate that consists of 2 P-MOS and 2 N-MOS gates. therefore the total current flows to the bottom which ends in zero current flow within the output terminal. In the other condition, one or 2 transistors won’t conduct Associate in Nursing this may offer an electrical circuit to ground which ends in total current flow through the bottom.

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